Agilex-7 AXI MCDMA for PCIe hang

Hi VenT_Altera​ 

We have already done running the example design and the result was positive. But we also found out that example design writes or reads number of bythes that is multiple of data bus width, and we run into the same issue when modified it and made it send 449, 450 and so on number of bytes.

We had the same issue in both MCDMA+BAS+BAM and BAS+BAM modes. But we need the first option as only in that configuration having user MSI-X and user FLR is possible.

Best,
Mikhail