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Aleh_TS's avatar
Aleh_TS
Icon for New Contributor rankNew Contributor
4 months ago
Solved

Agilex 5 dual simplex fitting

Hello all. In my project I have to implement HDMI input and HDMI output. As a starting point I took an example design, which is generated from HDMI IP core. This example uses the dual simplex to p...
Transceiver
  • Wincent_Altera's avatar
    Wincent_Altera
    4 months ago

    Hi Aleh_TS​ ,

    I just sent you the passing design , please check your inbox.
    I am using v25.1.1 previously.

    Regards,
    Wincent

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
4 months ago

Hi Aleh_TS 

I have attached the updated top.v file.
1) sda and scl signal is not connected at top.v
2) syspll_clk is mistakenly connected to syspll_lock signal.

Please try to adding the  sda and scl signal in top.v and removing the connection between syspll_clk  and syspll_lock
With the update i able to get the compilation passing. Can you please try it out ?
Else I would suggest you to continue with v24.2 which is working well - it save your effort.

Regards,

Wincent_Altera