addressing on-chip memory(cyclone IV) from PC via PCIe

Hi Ron,

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I guess I'll have to implement a DMA solution.

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Don't worry, you're not alone. I'm in the process of evaluating each of the PCIe cores. The Qsys PCIe core is not particularly useful. The PCIe-to-Avalon-MM bridge should really have inbound translation window remapping, and should have a built in DMA controller. It also has some timing issues:

http://www.alteraforum.com/forum/showthread.php?t=35678

Next I'll be looking at the MegaWizard design flow.

matthias, do you know of an existing DMA controller that supports scatter-gather lists on either the Avalon-MM side or PCIe side, with scatter-gather entries described by 64-bit PCIe addresses, Avalon-MM addresses, etc?

If I can't find what I want, I'll just write one (a statement that is much easier said than done).

Cheers,

Dave