Forum Discussion
Altera_Forum
Honored Contributor
10 years agoAccumulator in IP and RTL timing errors
Hello, I've implemented accumulator that computes the sum of 19-bit incoming data samples magnitudes for particular period of time to 33-bit bus. I use RTL: always @ (posedge clk) if (frame)...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- you can also apply a setup multicycle of 2 (hold of 1) to paths fom sqrt to accum and from accum to accum(as it is under frame enable) --- Quote End --- I've tried it. It still give me the same -14 ns error at the accumulator output.