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Altera_Forum
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14 years ago

about Merlin Burst Adapter

Hello, Now I'm writing an interface between Avalon bus and a LSI, changing Avalon bus signals(read, write,ect) to LSI control signals. An interface can deal with burst transfer is preferred. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

If your LSI (I've NFI what it is - but I assume some serial bus) needs a lot of clocks to perform an action, it may be better to perform the LSI transfer completely asynchronously and have the Avalon master (eg nios) either poll for completion or (if very very slow) take an interrupt.

That way you don't completely stall the nios cpu while your slow LSI transfer takes place, and you'll have complete control of the number of words read/written from the LSI slave in one transfer.

The nios cpu can only do burst transfers for cache line fill/write, but doesn't normally have that enabled because it isn't necessary for internal memory or SDRAM/DDR.