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lambert_yu's avatar
lambert_yu
Icon for Contributor rankContributor
4 years ago

About master and slave design of EMIF on arria 10

Hi all, I face problems about master and slave design of EMIF's IPs on arria 10: for this design case : 1) each emif_usr_clk signals from emif_master and emif_slave is always...
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Lambert,


I'm Adzim. Thanks for using the Intel Community.


May I know which memory type that you used?


Thanks,

Adzim


lambert_yu's avatar
lambert_yu
Icon for Contributor rankContributor
4 years ago

Hi Adzim,

I am using DDR4-2666 ( MT40A512M16LY-075), thanks.

Brs,

Lambert