Altera_ForumHonored Contributor18 years agoa problem about fir high_pass filter 我在dsp builder中用fir ip做了个高通滤波器,信号源是1khz和5khz的正弦信Ö...Show More
Altera_ForumHonored Contributor18 years agoThe problem has been solved by myself,thank you all the same.:)
Recent DiscussionsSerialLite II license for Arria10 FPGAAgilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wantedCORDIC ATan2 Failed to GenerateConfigurable transceiver enableSolvedWhere is High Speed Transceiver Demo Design in FPGA Wiki ?