A design based on the PCIe DMA transfer example design for Arria 10 device.

Hi,
using Signaltap to trace data send to DMA interface would be also my suggestion. Find out if and where it's corrupted in the framework.

I have used it successfully to locate a data alignment problem in PCIe hprxm_master https://community.intel.com/t5/FPGA-Intellectual-Property/PCIe-hprxm-master-doesn-t-handle-unaligned-reads-correctly/m-p/1498943