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Altera_Forum's avatar
Altera_Forum
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12 years ago

XAUI IP Core compilation problem

Hi, I am designing a state machine to send a UDP packet through XAUI. The packet will be divided into 72 bits and reach a XAUI PHY IP Core produced by Megafunction. So basically it is not so compl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thank you very much for kind answer.

However, I think I correctly specified the I/O standards by setting them to 1.5-V PCML. And they are all paired in p and n as shown in Pin Planner.

I simply connected all hsma_rx_p pins to the DATAIN and hsma_tx_p to DATAOUT.

According to the error messages, hsma_tx_p doesn't seem to have a problem, but only rx does.