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Honored Contributor
Honored ContributorXAUI IP Core compilation problem
Hi, I am designing a state machine to send a UDP packet through XAUI. The packet will be divided into 72 bits and reach a XAUI PHY IP Core produced by Megafunction. So basically it is not so compl...
Altera_ForumHonored Contributor
Honored ContributorThe errors are not pointing at anything 'deep inside into the code of the IP core'. On the face of it they're pointing at the way in which you have (or haven't) connected up 3 ports.
Take the first - the PLL reset port. It looks like that is referring to a PLL you have created and not one contained in the XAUI core. It doesn't like the way in which you are driving the 'RST' port on it. Are you driving the reset port? The same can be said for the 'DATAIN' port on the XAUI interface. This port name refers a name buried in the IP core but ultimately emerges at the top level. Again, what have you connected this to? Have a look at the the 'DATAOUT' port error in the same way
