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Honored ContributorWrong value from 7 segment display
Hello, I am a newbie here using Cyclone II FPGA starter dev board. I am trying to program (VHDL) the 7-segment displays on the FPGA starter board to display 4 digits value. Therefore the result is not what I want and it is weird. Can anybody help? Thankyou~
Code: LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY test IS PORT( HEX0,HEX1,HEX2,HEX3 :OUT STD_LOGIC_VECTOR (6 DOWNTO 0)); end test; architecture Behavior of test is begin HEX0 <="0001000" ; HEX1 <="0001000" ; HEX2 <="0001000" ; HEX3 <="0001000" ; END Behavior; the result is weird, "0010000" "0000000" "0000000" "0000000" respectively.:confused:7 Replies
Altera_ForumIt works!Thanks!
- Altera_Forum
The code is correct so far. You either should have copied pin location assignments from another Dev. Kits example design or entered it on your own. I can't know about.
As as result, th edesign should use the below location assignments. Can you verify them in the *.pin file?set_location_assignment PIN_J2 -to HEX0 set_location_assignment PIN_J1 -to HEX0 set_location_assignment PIN_H2 -to HEX0 set_location_assignment PIN_H1 -to HEX0 set_location_assignment PIN_F2 -to HEX0 set_location_assignment PIN_F1 -to HEX0 set_location_assignment PIN_E2 -to HEX0 set_location_assignment PIN_E1 -to HEX1 set_location_assignment PIN_H6 -to HEX1 set_location_assignment PIN_H5 -to HEX1 set_location_assignment PIN_H4 -to HEX1 set_location_assignment PIN_G3 -to HEX1 set_location_assignment PIN_D2 -to HEX1 set_location_assignment PIN_D1 -to HEX1 set_location_assignment PIN_G5 -to HEX2 set_location_assignment PIN_G6 -to HEX2 set_location_assignment PIN_C2 -to HEX2 set_location_assignment PIN_C1 -to HEX2 set_location_assignment PIN_E3 -to HEX2 set_location_assignment PIN_E4 -to HEX2 set_location_assignment PIN_D3 -to HEX2 set_location_assignment PIN_F4 -to HEX3 set_location_assignment PIN_D5 -to HEX3 set_location_assignment PIN_D6 -to HEX3 set_location_assignment PIN_J4 -to HEX3 set_location_assignment PIN_L8 -to HEX3 set_location_assignment PIN_F3 -to HEX3 set_location_assignment PIN_D4 -to HEX3 - Altera_Forum
I found the .pin file and looked at it, it just shows location of pins, I still don't know where my problem is.Could you help me and have a look at it?
- Altera_Forum
no, I am not sure, I am completely comfused about that. I've tried similar code in verilog before, using assignments simple to HEX0 to HEX3 and it works. But in VHDl,I don't know how to fix this.
How to check the pinout report? I've never seen it before... - Altera_Forum
Location assignments. Simply check the pinout report for correct locations of all HEX output signals.
- Altera_Forum
Sorry, what do you mean by pin defination?
- Altera_Forum
Sounds unlikely. Are you sure about a correct pin definition?
