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Altera_Forum's avatar
Altera_Forum
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13 years ago

Writing to EPCS64 EEPROM busy signal

Greetings,

I am currently writing flash image download code for my device and it is taking a serious amount of time to download. I put the operation on signal tap to take a snapshot of what it is doing and I see the data is asserted on the datain line and the wren is active high during this time. the write line pulses and then busy comes on .....for a time that seems to be forever. 640ms to be exact which in fpga land is the length of the precambrian era. Does anyone know why it takes sooooo long to soak the memory? Is there anything I can do to chop the time down?

Thanks

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Does the delay occur when you erase a block? The writing of a byte shouldn't take that long, but the erasing of a block can.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    When you say the busy signal you mean the WIP bit in the status register is set? Can you please verify that you can read out the silicon ID out of the flash with your code?