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Altera_Forum's avatar
Altera_Forum
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14 years ago

write master and waitrequest

hi, i have a custom memory mapped write master.

I want initialize a piece of the memory with all zeros, and after that, write a sub-part of these piece of memory with data coming from a fifo.

So i have 2 sources of data, a constant (zeros) and the fifo out.

So i need a multiplexer, i did an asynch mux because of the waitrequest signal behaviour.

writedata <= fifo_out when init= '0' else (others=> '0');

Is there a way to do a registered mux?

i can't manage the latency with waitrequest signal

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    You don't need an asynchronous mux. The write data vector needs to be sent at the same time than the write control signal and the address. If all of them are registered from the same place it will work. Then you only continue writing to other addresses when you read a waitrequest signal at 0.