Words are swapped after DMA transfer

Hello thanks for the replies.

The 540001 data @ 0xF000004 (which is the data at address 0xD500000) is swapped with 1. So that's the same as the rest, sorry for not clearing that up. That does tell me something goes wrong when reading though.

My DDR2 SDRAM is 16 bits wide.

The clock crossing is as follows:

Master-to-slave FIFO : 32

Slave-to-master FIFO: 64

Data width: 64

DMA controller:

32 bit Length register

FIFO depth: 64

All bursting is disabled. I do use the HPC controller though, since we didn't have the licences for others for Quartus 10.0 when I made it.

Changing addresses to:

 
void
* tx_data = (void*)ALTMEMDDR_1_BASE; /* pointer to data to send */
void* rx_buffer = (void*)(ALTMEMDDR_1_BASE+0x500004); /* pointer to rx buffer */

and (second function)

 
void* tx_data = (void*)(ALTMEMDDR_1_BASE+0x500004); /* pointer to data to send */
void* rx_buffer = (void*)(ALTMEMDDR_1_BASE+0x1000004); /* pointer to rx buffer */
 

And length of data transfer to 0x100 gives the following (same) result:

Content of DDR2 SDRAM after DMA operation
Address 0xC500004: 1
Address 0xC500008: 2
Address 0xC50000C: 3
Address 0xC500010: 4
Address 0xC500014: 5
Address 0xC500018: 6
Address 0xC50001C: 7
Address 0xC500020: 8
Content of DDR2 SDRAM after DMA operation
Address 0xD000004: 140001
Address 0xD000008: 3
Address 0xD00000C: 2
Address 0xD000010: 5
Address 0xD000014: 4
Address 0xD000018: 7
Address 0xD00001C: 6
Address 0xD000020: 9
Memory compare from starting address 0xC500004 to starting address 0xD000004 with 0x150000 bytes gives 0xFFFFFFEC 
End of program.

Using uncached addresses is doing the following right?:

 
void* tx_data = (void*)((ALTMEMDDR_1_BASE+0x1000004)| 0x80000000); 
void* rx_buffer = (void*)((ALTMEMDDR_1_BASE+0x2000004)| 0x80000000); 

This gives the same results (different data due different addresses):

Content of DDR2 SDRAM after DMA operation
Address 0x8D000004: 400002
Address 0x8D000008: 400003
Address 0x8D00000C: 400004
Address 0x8D000010: 400005
Address 0x8D000014: 400006
Address 0x8D000018: 400007
Address 0x8D00001C: 400008
Address 0x8D000020: 400009
Content of DDR2 SDRAM after DMA operation
Address 0x8E000004: 400001
Address 0x8E000008: 400004
Address 0x8E00000C: 400003
Address 0x8E000010: 400006
Address 0x8E000014: 400005
Address 0x8E000018: 400008
Address 0x8E00001C: 400007
Address 0x8E000020: 40000a