Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHave you tried with different buffer addresses and/or shorter dma counts?
Do you get the same behaviour? I'm concerned about the data you read back from 0xF000008: this shows you have an extra 0x0054 16bit data word which misalignes the following accesses. Is your DDR memory 32bit native or maybe is it 16bit and then packed by the controller? Other idea: try with uncached addresses, although probably the alt_dma functions already remap buffers to uncached memory.