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Altera_Forum
Honored Contributor
Honored ContributorWith the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?
Hello everyone,
I want to make something that records values that are in my FPGA. I thought of using the Cyclone V SoC DMA, I do have the Altera SoC kit. With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA? I want to set a trigger in the HPS DMA, so that when I send a signal to high level at FPGA Fabric, the DMA starts to copy a FPGA FABRIC RAM content to the DDR connected in the HPS and visible by the Linux running in the ARM. *Is this the easiest/fastest way of achieving what I want?22 Replies
Altera_ForumHi Dear aprado,
Could you please share your design to give me a guide? I'm blocked on FPGA-to-SDRAM + DMA for days. My email is : [email protected] Thank you very much for your help! Kind regards, Yuchen- Altera_Forum
If you are trying to move data between the HPS and FPGA have a look at this design, in the documentation directory you can review bandwidth numbers to see which path makes sense for your system: https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-example.html
As a general rule of thumb if you need to perform cacheable accesses use the F2H bridge with a DMA implemented in the FPGA, if you don't require cacheable accesses use the F2S ports and a FPGA DMA since that's where the bulk of the bandwidth is.
