Forum Discussion
Altera_Forum
Honored Contributor
9 years agoIf you are trying to move data between the HPS and FPGA have a look at this design, in the documentation directory you can review bandwidth numbers to see which path makes sense for your system: https://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-example.html
As a general rule of thumb if you need to perform cacheable accesses use the F2H bridge with a DMA implemented in the FPGA, if you don't require cacheable accesses use the F2S ports and a FPGA DMA since that's where the bulk of the bandwidth is.