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Altera_Forum
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11 years ago

With the Cyclone V SoC, how can I use the FPGA fabric to access the HPS DMA?

Hello everyone, I want to make something that records values that are in my FPGA. I thought of using the Cyclone V SoC DMA, I do have the Altera SoC kit. With the Cyclone V SoC, how can I ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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There are up to 6 FPGA-to-SDRAM ports that you can push that data directly into the HPS SDRAM controller from the FPGA. If it was me I would just use those to push the data in directly and interrupt the processor after the data has been written to memory. Alternatively you could push the data through the F2H bridge into the ACP mapper so that the processor has a cache coherent view of the data automatically (depends on how much data you are sending over).

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BadOmen do you have a link for a ref design or something that uses it that way? As far as I can see, I will need to limit a SDRAM area for the HPS, right? And reserve some for my FPGA fabric. I am finding very hard to find ref. designs for the HPS interacting with the FPGA.

Thanks for your answer, looks like the best way to do it. Maybe with a DMA (FPGA fabric) pushing to the SDRAM C