Wireless Connection2_FA

Great questions — here's a rundown on both.

Wireless Protocol Support on Agilex 9

Agilex 9 Direct RF-Series is purpose-built for next-generation RF systems. It covers a 100 MHz to 7.125 GHz frequency range (Medium-Band) and targets domains such as 5G Military Comms, 6G Wireless Prototyping, Quantum Computing, radar, electronic warfare, and high-speed instrumentation. Agilex™ 9 Direct RF-Series Medium-Band Development Kit

On the interface/protocol side:

• JESD204C Subclass 1 is the supported JESD protocol for the Agilex 9 SoC FPGA Direct RF-Series. Multiple Device Synchronization for Agilex™ 9 SoC FPGA Direct RF-Series
• The F-tile transceivers support JESD204B/C, along with CEI, Ethernet, CPRI, FlexE, Interlaken, Fibre Channel, SRIO, Serial Lite, OTN, FlexO, and IEEE 1588. Direct RF-Series FPGAs and SoCs Product Table
• The F-tile also includes a bifurcatable 400 GbE hard IP block (10/25/50/100/200/400 GbE FEC/PCS/MAC) and a bifurcatable 200 GbE hard IP block. Direct RF-Series FPGAs and SoCs Product Table

O-RAN IP Support on Agilex 9

Yes, Agilex 9 is supported by the O-RAN IP, but with an important caveat on the support level:

• Agilex 9 (F-tile) has Advance support for the O-RAN IP. O-RAN IP Device Family Support This means the IP is available for simulation and compilation, but timing closure cannot be guaranteed at this stage.
• The eCPRI IP v3.0.1 (Quartus Prime version 23.4) added support for Agilex 9 devices — IP only, not the design example. eCPRI IP Release Notes
• The O-RAN Design Example does not support window monitoring or application layer fragmentation. O-RAN IP Design Example User Guide
• Additionally, the design does not support dynamic reconfiguration between 25G and 10G Ethernet data rates. O-RAN IP Design Example User Guide

So if you're targeting Agilex 9 for an O-RAN front-haul design, the O-RAN IP itself (eCPRI IP included) is instantiable and simulatable, but be aware that you're operating under Advance support — verify timing closure carefully, and note the design example restrictions above.

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