Forum Discussion
NuvKFC
Contributor
Contributorwhy PLL miss output port?
I have a warning message that I don't why it appear. I use ALLPLL to generate other clocks. The output of PLL is from pll_c0 to pll_c5. Following's case are the case that I had tried at pll_c4.
Ca...
Ash_R_Altera
Regular Contributor
Regular ContributorSorry for the late response. Did you try using the ALTCLKCTRL block. It helps in clock switching.
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