Forum Discussion
Why do i get this error when I use lvds?
- 1 year ago
Hi,
Yes, I found it in Volume 2, pages 4-18, from the link I provided earlier.
Let me know if you can't find it.
Regards,
Aqid
Hello,
Okay, if it’s AC coupled, then it will need DC restoration resistors on the board. The GPIO and dedicated clock pins in our devices do not have DC biasing capability and require external circuitry when AC coupling. The transceivers have the required termination and biasing circuits to support AC coupling.
Here is an example from the Cyclone 10 GX Handbook that shows AC coupling with the DC restoration circuit. VICM can be set with a voltage divider or power supply, typical values used by customers is 1.2V or 1.25V. Then the two 50 Ohm resistors serve as the DC bias connection and 100 Ohm differential termination:
https://www.intel.com/content/www/us/en/docs/programmable/683775/current/lvpecl-termination.html
Thanks.
- MinzhiWang1 year ago
Occasional Contributor
Hi Aqid,
Thanks for you info above. There are two things which need to confirm with you.
1. Your provided example is of external LVPECL drives FPGA LVPECL I/O. You know, our case is of external CML drives FPGA LVDS I/O. Can we use the same structure of the example in our case?
2. If item 1's answer is "Yes". According to your comments "Then the two 50 Ohm resistors serve as the DC bias connection and 100 Ohm differential termination", after using this structure, the LVDS receiver's inside differential OCT should not need to be used any more?
Thanks