Why can't I do simuation?

Thank for reply.

Do yo mean I should go to "Assignments->Settings->EDA Tool Settings->Simulation?

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When I tried to do simulation, a window popped out with the error:

"No simulation input file assignment specified on Simulator page of the Settings Dialog box".

I checked the '"Assignments->Settings", I found I included my vwf file into the project. Then, why can't I do simulation?....

Your advice and help are highly appreciated!

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I get into the same problenm:(:(

I want to execute D_FF like this into DE1 kit, but I do not know to use clock pin, reset for KIT. Please, help me

library ieee;

use ieee.std_logic_1164.all;

entity d_ff is

port(

clock: in std_logic;

d: in std_logic;

q: out std_logic

);

end d_ff;

architecture arch_dff of d_ff is

begin

process(clock)

begin

if (clock'event and clock='1') then

q <= d;

end if;

end process;

end arch_dff;

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No, that's for creating an output file to do simulations in a 3rd party tool. In the Assignments -> Settings box, along the left side where you see things like Files and EDA Tool Settings, there should be one called Simulator Settings, and you add the file there.

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This doesn't work for my version Modelsim version 6.5b (has to use this version to simulate legacy AHDL code).

I have several screen dump files in PNG-format that illustrates the issue, however this site doesn't accept png-format files. :(

Hope to hear from you soon.