Why Altera do not integrate ADC into CPLD?

I think, the best thing Altera can do is to supply ip interfaces to common ADC's to assist the user and to collaborate with adc vendors on new interface architectures.

Note, its not so many years ago the ADC's got LVDS ports simplifying gnd separation. Also we now see adc's with built-in test pattern generators which are very useful to verify the timing and integrity of the board. I have yet to see an adc with JTAG test port features!

I wonder when ADC's which fits seamlessly into an Altera SERDES port will appear?

Would be nice though.