Which nios version to use with mSGDMA

I am trying to use the economy nios with the mSGDMA to save streaming data to SDRAM on the DE0-Nano board. Should I be using the standard or fast nios instead. I am not able to get data to even begin saving to SDRAM.

The code writes descriptors to the dispatcher, and then the dispatcher fifo fills up and no new descriptors can be written. To me it seems that the descriptors are not being executed. I tried using the standard and extended versions of the dispatcher. Neither writes the streaming data to SDRAM. I've tried using Burst and Stride options in the extended dispatcher, they don't work either.

Let me know what I am doing wrong or if this is related to the nios set up (i am using /e). It seems I'm missing something fundamental but I can figure out what...

Thanks.

My qsys set up is as follows:

Transfer mode: streaming to memory

Descriptor fifo: 32

Data width: 32

Length width: 20

FIFO depth: 64

Burst Enable: on

Maximum Burst Count: 16

Force Burst Alignment: on

Full Word Access Only

Here is a snippet of my code:

alt_ic_isr_register (MODULAR_SGDMA_DISPATCHER_CSR_IRQ_INTERRUPT_CONTROLLER_ID, MODULAR_SGDMA_DISPATCHER_CSR_IRQ, sgdma_complete_isr, NULL, NULL); // register the ISR

enable_global_interrupt_mask(MODULAR_SGDMA_DISPATCHER_CSR_BASE);

reset_dispatcher(MODULAR_SGDMA_DISPATCHER_CSR_BASE);

start_dispatcher(MODULAR_SGDMA_DISPATCHER_CSR_BASE);

write_address = DATA_DESTINATION_BASE;

//This sets up the dispatcher.

//next in a do while loop...

alt_dcache_flush_all();

while ((RD_CSR_STATUS(MODULAR_SGDMA_DISPATCHER_CSR_BASE) & CSR_DESCRIPTOR_BUFFER_FULL_MASK) != 0)

{

printf("fifo full");

} // spin until there is room for another descriptor to be written to the SGDMA

control_bits = (sequence_field == test_end - 1) ? DESCRIPTOR_CONTROL_TRANSFER_COMPLETE_IRQ_MASK : (DESCRIPTOR_CONTROL_EARLY_DONE_ENABLE_MASK | DESCRIPTOR_CONTROL_ERROR_IRQ_MASK);

construct_standard_st_to_mm_descriptor(a_descriptor_ptr,(alt_u32 *)write_address,0xFFFFFFFF,control_bits);

printf("0x%lx\n",sequence_field);

//increment 16kB address:

write_address = write_address + MAXIMUM_BUFFER_SIZE;

sequence_field++;

if (write_address > RAM_SPAN + RAM_BASE_ADDRESS){

write_address = DATA_DESTINATION_BASE;

}

if(write_standard_descriptor(MODULAR_SGDMA_DISPATCHER_CSR_BASE, MODULAR_SGDMA_DISPATCHER_DESCRIPTOR_SLAVE_BASE, a_descriptor_ptr) != 0)

{

printf("Failed to write descriptor 0x%lx to the descriptor SGDMA port.", sequence_field);

return 1;

}