Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThis post is timely, because I have been having an issue related to it. For larger multipliers, lpm_mult creates logic that is much faster. In my case of a signed 32x32 multiply, lpm_mult is double the speed of using "*" in Verilog. For a reference, here is my code:
module mult_test(
input CLK,
input signed IN_A,
input signed IN_B,
output signed OUT_C
);
//Verilog version
reg signed IN_A_d1;
reg signed IN_B_d1;
reg signed mult_result;
assign mult_result = IN_A_d1 * IN_B_d1;
always @(posedge CLK) begin
IN_A_d1 <= IN_A;
IN_B_d1 <= IN_B;
OUT_C <= mult_result;
end
/*
//Altera LPM Megafunction version
//Created as signed 32x32 -> 64-bit multiply with 2 cycles of latency
wire signed mult_result;
assign OUT_C = mult_result;
megafunction_mult megafunction_mult_inst (
.clock (CLK),
.dataa (IN_A),
.datab (IN_B),
.result (mult_result)
);*/
endmodule
I get 90 MHz fmax with the SystemVerilog version, and 179 MHz with the lpm_mult version. I would rather use "*" for code portability, but the 50% speed cut is unbearable in my application.