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Altera_Forum's avatar
Altera_Forum
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14 years ago

what is the difference between RTL simulation and gate level simulation..

I don't know the difference between RTL simulation and gate level simulation. when i coded program in VHDL, RTL simulation tool is good working, but when i coded program in block diagram, RT...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thank you.

My only concern with using STD_LOGIC_VECTORS was that it would be more complex to do simple mathematical operations such as +1 for counting increments. Since then though I have had a look on that there interweb and discovered that if I use the correct library i should just be able to do it the same way as I do to an integer.

thanks for your help, quick and to the point.

D