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Altera_Forum
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13 years ago

What is the difference..?

Hello , I am starter in VHDL . Is there any difference between two sources below? They are different i think. first source uses vector signal in the entity body. second source us...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

synthesizing both codes U will get same hardware with 3 inputs and one output (of cource with cs1400's suggestion). they are not really different.