Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

What is the best way to generate multiple clocks with minimum jitter and delays?

Hi, I have to generate several clocks on Arria 10 SoC board. The clocks and their applications are as follows: 3GHz clock: for clocking external ADC to sample the incoming data, and receive...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

I see. I was thinking of taking the output clock through the transceiver pins of the FMC connector. I think I'll have to use the clock on the ADC board for sampling then.

However, the problem of synchronizing the 150MHz and 1.5GHz still remains.