what is fast input？

This assignment forces registers into the I/O cell. (If the device does not have registers in the I/O cell, then it forces them into the LAB next to the I/O). This was used a lot many years ago when the fitter wasn't as good at determining if registers should go in the I/O cell. Technically, the best way now is to enter the correct timing constraints on the I/O, and the fitter will figure out where to put the registers. Many people still use it on interfaces they dont' put timing constraints on, or just because they feel safe with it, since it takes away any decisions the fitter could make. (This all assumes the RTL has a register next to the top-level port. If you have a big cloud of logic, then the I/O cell register can't be used and you'll get an assignment that the warning was ignored.) Also, you can apply the assignment to the register names, but it's usually just applied to the top-level port name(the port name is in the To column of the assignment editor and the From column is left empty).