Forum Discussion
FvM
Super Contributor
2 years agoHi,
there's at least one serious fault. VCCD_PLL has to be connected to 1.2V rail.
Everything else looks correct at first sight. AS memory can be programmed through JTAG indirect method, generate .jic file with programming file converter tool, open it in Quartus programmer and write it to flash.
As first test for FPGA function, either try to write .sof file or perform FPGA autodetect in Quartus programmer.