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Altera_Forum
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13 years ago

What if design is too big for an FPGA

I was wondering about what to do if a design is too big for an FPGA. Suppose I am trying to make a DSP circuit like the one for H.264 or MPEG video encoding and the FPGA has insufficient resources. O...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

A project manager starts from realistic estimates done by him/her and their team. From that the chip(s) are chosen. This is the crucial point when sales crew from Altera or Xilinx ...etc hoover around right at the premises of their heavy weight customers ready for discount offers and possibly dining out.

A project may require several chips but I don't know of any tool that will integrate all into a single multichip project(super project) and it doesn't need to. Each chip can have its own project.

Designs may be migrated to ASIC if they are stable market-wise and there is the thought of lowering cost per unit. But when customers keep asking for new features then FPGAs stay best platform.

If a single chip is chosen and the design did not fit then the project manager will have to blame the estimates and may resort to the firing squad. But many designs can be reduced by rethinking and personally I believe some 25% is commonly wasted by a moderate designer and up to 70% wasted by beginners. There is unfortunately no tool to measure this wastage.