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schlee68's avatar
schlee68
Icon for New Contributor rankNew Contributor
3 years ago
Solved

What does _CH[B,T]p mean?

Hi Everyone!

I have a question about pin name.

In pdf document "Intel Arria 10 GX, GT, and SX Device Family Pin Connection Guidelines"

Explained..

RREF_[T,B][L,R] - . . . top (T) side or bottom (B) side and left (L) side or right
(R) side of the device.

So, my question is below...

1. REFCLK_GXB[L1,R4] [C,D,E,F,G,H,I,J]_CH[B,T]n

What does CH mean?

What does [B,T] mean? Is this a Bottom or Top?

2. VREFB[[2][A,F,G,H,I,J,K, L], [3][A, B,C,D,E,F,G, H]]N0

What does N0 mean?

Thanks!

  • WZ2's avatar
    WZ2
    3 years ago

    Hi there,

    For1.

    CH is Channal, b t is bottom and top.

    For2.

    There is no meaning for N0. You don’t need to care about it~

    Best regards,

    WZ


5 Replies

  • MADesigner's avatar
    MADesigner
    Icon for Occasional Contributor rankOccasional Contributor
    2 days ago

    Right.

    So after I pick one that is most convenient, do I connect the other ground or leave floating?

  • MADesigner's avatar
    MADesigner
    Icon for Occasional Contributor rankOccasional Contributor
    2 days ago

    I know this is from 3 years ago, but....

    Which clock do I choose for the REF_CLK_GXBL?? for the transceiver in that same IO Bank, B or T? Do I connect both to the same clock source? Do I only connect one and the other to ground? Does it matter which one I choose?

    Why does the FPGA that has all its connections in a ball grid array on th bottom have a clock input labeled as Top or Bottom?

    • sstrell's avatar
      sstrell
      Icon for Super Contributor rankSuper Contributor
      2 days ago

      Top or bottom edge of the device.

  • WZ2's avatar
    WZ2
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi there,

    For1.

    CH is Channal, b t is bottom and top.

    For2.

    There is no meaning for N0. You don’t need to care about it~

    Best regards,

    WZ