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HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
6 years ago
Solved

What are the exact definitions of chip-to-chip, chip-to-module and back-plane applications?

In FPGA (stratix 10) transceiver user guide, it is mentioned that transceivers can be used for "integrated advanced highspeed analog signal conditioning and clock data recovery circuits for chip-to-...
  • CheepinC_altera's avatar
    CheepinC_altera
    6 years ago
    Hi HPB, Regarding your inquiry on the different connection interface, let me try to explain at high level as following: 1. Chip-to-chip -> direct connection between two FPGA ie S10 to S10. 2. chip-to-module -> connection between FPGA with other chips 3. backplane -> this is a interface where several boards are connection to form a computer system. Generally used in servers. You may try to search in web for better definition of backplane connection. Currently there is no specific information in term of the electrical traces in the documentation. Sorry for the inconvenience. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago
Hi HPB, Regarding your inquiry on the different connection interface, let me try to explain at high level as following: 1. Chip-to-chip -> direct connection between two FPGA ie S10 to S10. 2. chip-to-module -> connection between FPGA with other chips 3. backplane -> this is a interface where several boards are connection to form a computer system. Generally used in servers. You may try to search in web for better definition of backplane connection. Currently there is no specific information in term of the electrical traces in the documentation. Sorry for the inconvenience. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
  • HBhat2's avatar
    HBhat2
    Icon for Contributor rankContributor
    6 years ago

    Hi Chee Pin,

    Thanks for your explanation. I had a big doubt regarding chip to chip and chip to module interface. I got some satisfied answer after searching a lot. I am convinced by your answer. However, could you share any document/literature which I can consider as the document reference for above definitions?

    With Regards,

    HPB