Occasional ContributorHi,
Presently I am implementing an ASIC IP in FPGA. Some of the ASIC source files are .vs and .vm file extensions.
What are .vs and .vm file extensions? Are they supported in quartus for compilation.
Even though I compile the project in quartus. the hierarchy window shows the Project in a different way than usual quartus project. The snapshot of the hierarchy view is attached. What could be the reasons for this.
Super ContributorNope, I am not aware that we support .vs or vm.
We support vqm though https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/mapIdTopics/mwh1465406414431.htm
Super ContributorYou may also take a look in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an311.pdf
Super Contributorany further queries?
Super ContributorWe do not receive any response from you to the previous question that we have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.
