Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

VREF pin and EPCS and OCT questions

1. In the Cyclone iii's Pin Guidelines, it says" the VREF pins are available as user I/O pins. All of the VREF pins within a bank are shorted together." Does it mean that the four VREF pins in a bank are shorted when they are I/O pins? And how i set them as I/O pins?

2. How can i use the EPCS as an external flash? Do i need another pin to control the CS pin of the EPCS?

3. How can i set the OCT? I don't know how to enable the OCT.

Thank you!

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    1. no, they are individual I/O, not tied together. you can use the pin planner to assign your design's ports to the VREF pins and QII will use that as a user I/O

    2. take a look at the EPCS Controller

    3. go to Assignments > Settings, create a new assignment for your pin and select Output Termination as the Assignment Name, and select a value
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Thank you.

    But i use the Quartus 7.2, and i only find a "Enable OCT DONE" option. Can someone tell me how to enable the OCT?