Voltage range added on I/Os

Digital inputs of MAX197 have a TTL specification and can be driven by a 3.3V supplied FPGA output, but data from MAX197 to FPGA need a level conversion. Because the data bus is birectional, either 5V tolerant bidirectional buffer (e.g. 74LVC245), a true level converting buffer, or at least series resistors and PCI clamp diodes at the FPGA should be used.