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Altera_Forum
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8 years ago

voltage level of GPIO pins of Cyclone 10 GX

Hi all, I have recently encountered a problem while working with a design that has alot (4 to 5) 3.3 v I/O peripherals to be interfaced with Cyclone 10 GX FPGA. The design challenge is the FPGA...
Altera_Forum's avatar
Altera_Forum
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8 years ago

What exactly do you mean by "synchronizer". If you want to control the skew in your signals you can specify what you need through the timing constraints for the MAX10. You can guarantee the max skew this way.