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Honored Contributor
Honored Contributorvoltage level of GPIO pins of Cyclone 10 GX
Hi all, I have recently encountered a problem while working with a design that has alot (4 to 5) 3.3 v I/O peripherals to be interfaced with Cyclone 10 GX FPGA. The design challenge is the FPGA...
Altera_ForumHonored Contributor
Honored ContributorThank you for the answer...I guess that's the only solution... Could you name some FPGA families that would suffice...so that there is a tradeoff between cost and complexity..as the second FPGA only has to handle the voltage translation...a lower cost FPGA would be enough I assume?
