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You don't show the upper-level (or top-level) ports, but usually write enable and the other control signals are outputs to a flash device, not inputs.
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Thank you for your reply.
But I am getting the same error for address as well. The Flash_address is input std_logic_vector of 23 bits.
But it still says
Error (12012): Port direction mismatch for entity "Flash_intf:Flash_Interface_Program|Flash:Flash_inst" at port "flash_addr". Upper entity is expecting "Input" pin while lower entity is using "Output" pin.
I don't think address is also output.
Can you suggest what might be going wrong with this parameter?
Thank you once again.