Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

VHDL: inout port error: multiple drivers

Hello, I have defined an entity with some ports. One of these ports is defined as follows: data : inout std_logic_vector (63 downto 0); As you see, I want to read from or wr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

--- Quote Start ---

It's essential, that the entity not writing to the port must write "ZZZZ" instead.

--- Quote End ---

Yes. I changed my code and then it worked. Thank you.

--- Quote Start ---

inout ports should only really be used at pin levels, and then they should be avoided if possible.

--- Quote End ---

In this case, inout ports were necessary because my entitiy had to be connected to another entity, which had also an inout port and I couldn't change this because I couldn't see the source code (viewing support not included).