VHDL: inout port error: multiple drivers

The basic fact, that a signal can only have one driver at a time also applies for signals that are connected through the hierarchies. The simple and obvious solution is to have a signal along with the data port, that controls which side is allowed to write to the inout port. It's essential, that the entity not writing to the port must write "ZZZZ" instead. It works like a dual- or multi-drop bidirectional data bus with tristate drivers. Quartus is translating this construct to multiplexers, so another solution is to use unidirectional signals and explicite multiplexers.