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Altera_Forum's avatar
Altera_Forum
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14 years ago

vhdl coding

hi am new to vhdl programming. I need help in wirting the code for inserting variable data into a register. the length of the register should be based on the number of bits of data am giving to the r...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

hi K_J

I have tried the signal statement

signal data: std_logic_vector(numofbits - 1 downto 0);

but i got an error that the numofbits does not support with its natural usage.

can you please help me.