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Altera_Forum's avatar
Altera_Forum
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11 years ago

Verilog/VHDL versus high level functions.

Im new to this, coming from audio programming in MSP/Reaktor and lower level assembler. So I have to learn a lot about the FPGA stuff as I go along. But two things came to mind. It was hint...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Ah, so ideally one has to make a series of files discribing a "possibly tightly packed" paralel process.

I see in a binary scenario this would be useless to evaluate like that..

One more :D Is it possible to map functions directly to the output? Without describing the architecture..