Verilog/VHDL versus high level functions.

So..about multiple processes in one peice of code. Do these become serial or paralel by default, or is there a way to tell the compiler this function goes under and this one after?

if areset = '1' then <--I see you do not close the sentence, nor use brackets.. musnt it be: if reset > '0' then A; --?

Oh I see its only at the paralel statements, but would it be bad practice to just and A?

Oh and one more the '1' brackets what do they mean?