Verilog/VHDL versus high level functions.

A matter of preference. Verilog has enough sources online to get oneself to be proficient. VHDL would be a nightmare to start, due to the strict typing as mentioned by josyb.

By the way, functions and procedures are supported in Verilog-2001, and multi-dimensional arrays in system-Verilog (could be even earlier). Verilog as C-like would be an overstatement since if you write in C-style coding Verilog, high chances your code will not be synthesizable. Major difference is concurrency vs sequential, which most software programmers struggle with initially.