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And Quartus has the high level visual logic blocks and pll's, right.
Tho I think it's very cool to be able to use a lot of 1 bit signals and binary stuff.
Mostly for the core modules I would be confortable using 24bit floating point numbers. and A=A+1 style counting.
So it would be great to have that sort of thing in a readable format, but ofcourse there is nothing worse than finding out half way through things cant be done.
I was looking at VHDL for the demo apps, it seems a bit double in it's expressions but slowly grasping it. So you say Verilog is worth checking out for audio, or am I going to hit a major wall somewhere?
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HDL design can be classified into 3 levels (usually mixed by users):
structural: e.g. you instantiate a register directly wiring it, or instantiate an and function (ultimately mapped to luts)
logic (or not exactly data flow): e.g. you a <= b and C
behavioral: e.g. you describe in a sequential statement how a given node should behave.
In all cases the compiler settles and maps the code to luts and registers and other prefabricated blocks like rams, multipliers...etc.
It is certainly waste of time to go structural for things like registers which you can infer by behavioral description. You can also infer memories, multipliers (but not PLL) however I prefer structural approach to both rams and multipliers for good reasons as you may be given access to more features.
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