Verilog NetList Writer in Max+plus II(AND1 - ?)

After compiling project I get Verilog file with *.vo open him and find AND1 code... AND1 AND1_30 ( N_66, N_67 ); // N_66, N_67 is wire INV INV_31 ( N_67, B7 ); // AND1 AND1_32 ( N_69, ...