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Altera_Forum
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14 years ago

verilog error

FATAL_ERROR:Simulator:Fuse.cpp:209:1.128.12.1 - Failed to compile one of the generated C files. Please recompile with -mt off -v 1 switch to identify which design unit failed. Process will terminate...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

i am doing this code in xilinx 13.1.and the simulator is isim....thanks for responding.