Varible clock rate

Hello kaz

Thank you very much for your help. Your code looks similar for me, mine is a little bit more cosmectic.

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Remember all your clked staements and clked components must have clk enable added to them.

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Yes, I will implement it as code block

always @(posedge clk or ClkEnable rst)
begin
  // do something
end

I am currently struggeling a little bit if e.g. a 20 Mhz clock can be realized using a clock rate of 25 MHz because the enable signal itself is derived from the 25 MHz clock

I will let you know if it works!

Best regards and thank you again

Geri