Forum Discussion
Altera_Forum
Honored Contributor
16 years agoMaybe you can look at the rrdy bit in the status register. This bit is set to one if data is transfered. Otherwise it is set to zero. But then you could have the problem that data could be lost. If you have Quartus 9 there is an UART with build in fifo. There you can look if this fifo is filled and then you can read it, otherwise you are doing something else.